Light-emitting device, and electric device using the same

ABSTRACT

A light-emitting device having a higher aperture ratio in pixels than that of the prior art.  
     A source signal line and a current supply line to be connected with a pixel unit are switched by a switching circuit to use a common wiring line so that the number of wiring lines in the pixel unit is reduced to realize the high aperture ratio.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a light emitting device. Moreparticularly, the invention relates to an active matrix typelight-emitting device having thin film transistors (TFTs) over aninsulator.

[0003] 2. Related Art

[0004] In recent years, the technique of forming TFTs over a substratehas made drastic progress to develop the applications to the activematrix type display device (or the light-emitting device). Especially,the TFTs using a poly-silicon film have a higher field effect mobility(or simply, a mobility) than that of the TFTs using an amorphous siliconfilm of the prior art so that they can act at a high speed. Therefore,the control of the pixels, as has been made in the prior art by a drivercircuit outside of the substrate, can be made by a driver circuit whichis formed over the substrate common to the pixels.

[0005] This active matrix type light-emitting device is enabled byforming various circuits and elements over the common substrate to havevarious advantages such as the reduction in the manufacture cost, thesize reduction of an electro-optic device, the rise in the yield or thedrop of the throughput.

[0006] Moreover, there has been vigorously investigated the activematrix type light-emitting device (or the EL display) which has ELelements as its light-emitting elements. The EL display is also calledeither the organic EL display (OELD) or the organic light emitting diode(OLED).

[0007] The EL display is of the spontaneous luminescence type. The ELelement has a structure in which an EL layer is sandwiched between apair of electrodes (i.e., an anode and a cathode), and the EL layerusually has a laminated structure, as represented by the structure of“hole transfer layer/luminescent layer/electron transfer layer” proposedby Tang et al., of Kodak Eastman Company. This structure has such a highluminescence efficiency that most of the EL displays being investigatedand developed adopt it.

[0008] The structure may be exemplified by another lamination of holeinjection layer/hole transfer layer/luminescence layer/electron transferlayer, or hole injection layer/hole transfer layer/luminescencelayer/electron transfer layer/electron injection layer over the anode.The luminescence layer may also be doped with a fluorescent pigment orthe like.

[0009] Herein, all the layers to be interposed between the cathode andthe anode will be generally called the “EL layer”. Specifically, the ELlayer means the layer which contains an organic EL material capable ofestablishing the EL (Electro Luminescence, as established by applying anelectric field), and all the aforementioned hole injection layer, holetransfer layer, luminescence layer, electron transfer layer and electroninjection layer are contained in the EL layer.

[0010] On the other hand, the luminescence to be obtained by the organicEL material is one (of fluorescence) at the return from a single excitedstate to the ground state or the other (of phosphorescence) at thereturn from the triple excited state to the ground state. Thelight-emitting device of the invention can adopt the EL element havingeither of the organic EL materials.

[0011] By applying a predetermined voltage to the EL layer having theaforementioned structure from the paired electrodes, moreover, thecarriers in the luminescence layer are recombined to emit light. Herein,the light-emitting element, as formed of the anode, the EL layer and thecathode, will be called the EL element.

[0012] In the EL display, there are formed in a matrix shape a pluralityof pixels, each of which has a thin film transistor (TFT) and an ELelement. FIG. 17 shows a pixel of the EL display in an enlarged scale. Apixel 1700 is composed of a switching TFT 1701, a current controllingTFT 1702, an EL element 1703, a source signal line 1704, a gate signalline 1705, a current supply line 1706 and a capacitor 1707.

[0013] A gate electrode of the switching TFT 1701 is connected with thegate signal line 1705. On the other hand, one of the source region andthe drain region of the switching TFT 1701 is connected with the sourcesignal line, the other is connected with the gate electrode of thecurrent controlling TFT 1702. A source region of the current controllingTFT 1702 is connected with the current supply line 1706 and a drainregion of the current controlling TFT 1702 is connected with the anodeor cathode of the EL element 1703.

[0014] Where the anode of the EL element 1703 is connected with thedrain region of the current controlling TFT 1702, its anode is a pixelelectrode, and its cathode is an opposed electrode. Where the cathode ofthe EL element 1703 is connected with the drain region of the currentcontrolling TFT 1702, on the contrary, its anode is an opposedelectrode, and its cathode is a pixel electrode.

[0015] Herein, the potential difference between the potential of thepixel electrode and the potential of the opposed electrode will becalled the “EL driving voltage”, which is applied to the EL layer.

[0016] Here, the capacitor 1707 need not always be provided. If any, thecapacitor 1707 is connected with the current controlling TFT 1702 andthe current supply line 1706, as shown in FIG. 17.

[0017] The potential (i.e., the supply potential) of the current supplyline 1706 is held constant. The potential of the opposed electrode ofthe EL element 1703 is also held constant. This potential of the opposedelectrode is given such a potential difference from the supply potentialthat the EL element may luminesce when the supply potential is appliedto the pixel electrode of the EL element.

[0018] The switching TFT 1701 is turned ON with the selection signalinputted to the gate signal line 1705. Herein, the ON state of the TFTmeans that the drain current of the TFT takes a value of 0 or higher.

[0019] When the switching TFT 1701 is turned ON, the video signals, asinputted from the source signal line 1704, are inputted through theswitching TFT 1701 to the gate electrode of the current controlling TFT1702. Here, the inputting of a signal through the switching TFT 1701 tothe gate electrode of the current controlling TFT 1702 means that thesignal is inputted through the active layer of the switching TFT 1701 tothe gate electrode of the current controlling TFT 1702.

[0020] The amount of the current to flow through the channel formingregion of the current controlling TFT 1702 is controlled with a gateelectrode Vgs or the potential difference between the gate electrode andthe source region of the current controlling TFT 1702. Therefore, thepotential to be applied to the pixel electrode of the EL element 1703 isdetermined by the level of the potential of the video signals, asinputted to the gate electrode of the current controlling TFT 1702. Bythe level of the potential fed to the pixel electrode, moreover, theluminescent luminance (i.e., the luminance of the light emitted by theEL element) of the EL element is controlled. In other words, the ELelement 1703 is controlled in its luminance to effect the gradationdisplay by the potential of the video signals inputted to the sourcesignal line 1704.

[0021] In recent years, the reduction in the pixel size has beenadvanced to desire a finer image. This pixel miniaturization hasincreased the area for forming the TFT and the wiring line in one pixelthereby to reduce the pixel aperture ratio.

[0022] In order to achieve a high aperture ratio of each pixel in aregulated pixel size, therefore, it is essential to make an efficientlayout of the circuit elements necessary for the circuit construction ofthe pixels.

[0023] In order to realize the active matrix type light-emitting deviceof the pixel aperture ratio, as described above, there has been desireda novel pixel construction.

SUMMARY OF THE INVENTION

[0024] In view of the desire, therefore, an object of the invention isto provide a light-emitting device which has pixels of a high apertureratio by using a pixel construction in which a source signal line and acurrent supply line are exemplified by a common wiring line.

[0025] The invention is characterized in that the aperture ratio inpixels is enhanced by exemplifying a source signal line and a currentsupply line connected with a pixel unit, by a common wiring line.

[0026] The source signal line connected with a source signal line drivercircuit and the current supply line connected with a power source areindividually connected with a switching circuit. On the other hand, theswitching circuit and the pixel unit are connected by the wiring line.Moreover, this wiring line is used as the source signal line or thecurrent supply line by a switching signal inputted to the switchingcircuit.

BRIEF DESCRIPTION OF THE DRAWINGS

[0027]FIG. 1 is a diagram showing a circuit construction of alight-emitting device of the invention;

[0028]FIG. 2 is a diagram showing a switching circuit of thelight-emitting device of the invention;

[0029]FIGS. 3A and 3B are diagrams showing switching circuits of thelight-emitting device of the invention;

[0030]FIGS. 4A and 4B are circuit diagrams of a pixel portion of thelight-emitting device of the invention;

[0031]FIG. 5 is a circuit diagram of a pixel of the light-emittingdevice of the invention;

[0032]FIG. 6 is a diagram showing a drive method of the light-emittingdevice of the invention;

[0033]FIG. 7 is a top plan view of the light-emitting device of theinvention;

[0034]FIG. 8 is a diagram showing a circuit construction of alight-emitting device of the invention;

[0035]FIG. 9 is a circuit diagram of a pixel portion of thelight-emitting device of the invention;

[0036]FIG. 10 is a circuit diagram of a pixel of the light-emittingdevice of the invention;

[0037]FIG. 11 is a diagram showing a drive method of the light-emittingdevice of the invention;

[0038]FIG. 12 is a top plan view of the light-emitting device of theinvention;

[0039]FIG. 13A and 13B are diagrams showing a circuit construction of alight-emitting device of the invention;

[0040]FIG. 14 is a diagram showing a drive method of the light-emittingdevice of the invention;

[0041]FIGS. 15A to 15F show electric devices using the light-emittingdevice of the invention;

[0042]FIGS. 16A and 16B show electric devices using the light-emittingdevice of the invention; and

[0043]FIG. 17 is a circuit diagram of a pixel portion of theconventional light-emitting device.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0044] A block diagram of the light-emitting device of the invention isshown in FIG. 1. Here, a TFT to be included in the light-emitting deviceused in the invention is not limitative but may be exemplified by theplanar type or the inverse stagger type. Moreover, the driver circuit ofthe light-emitting device to be used in the invention may be exemplifiedby combining the well-known ones.

[0045] In the invention, moreover, the element structure and material ofan EL element belonging to the light-emitting device can be exemplifiedby those of the prior art. On the other hand, the construction of theinvention can also be used to correspond to the well-known liquidcrystal device.

[0046] The light-emitting device of FIG. 1 is provided with a pixelportion 101 of the TFT formed over a substrate, and a source signal linedriver circuit 102 and gate signal line driver circuits 103 arranged inthe periphery of the pixel portion 101. On the other hand, numeral 104designates a time-division gradation data signal generating circuit(SPC: Serial-to-Parallel Conversion Circuit).

[0047] The source signal line driver circuit 102 is basically providedwith a shift register 102 a, a latch (A) 102 a, a latch (B) 102 c, and abuffer (not-shown).

[0048] Here, the light-emitting device of this embodiment is providedwith one source signal line driver circuit but may be provided with twosource signal line driver circuits over and below the pixel unit.

[0049] In the invention, on the other hand, the source signal linedriver circuit 102 and the gate signal line driver circuits 103 may beconstructed to overlie the substrate having the pixel portion 101 butmay also be constructed to be formed over an IC chip and connected withthe pixel portion 101 through an FPC or TAB.

[0050] In the source signal line driver circuit 102, a clock signal(CLK) and a start pulse (SP) are inputted to the shift register 102 a.On the basis of those clock signal (CLK) and start pulse (SP), the shiftregister 102 a generates timing signals sequentially and feeds themsequentially to a circuit at the subsequent stage through a (not-shown)buffer or the like.

[0051] The timing signal from the shift register 102 a is buffed andamplified by the buffer or the like. The wiring line to be fed with thetiming signal is connected with many circuits or elements so that itsload capacity (or parasitic capacity) is high. The buffer is providedfor preventing the “bluntness” of the rise or fall of the timing signal,as caused because of the high load capacity.

[0052] The timing signal thus buffed and amplified by the buffer is fedto the latch (A) 102 b. This latch (A) 102 b is composed of latches of aplurality of stages for processing n-bit digital data signals. Inresponse to the timing signal, the latch (A) 102 b fetches and latchesthe n-bit digital data signals, as fed from the time-division gradationdata signal generating circuit 104, sequentially.

[0053] Here, the digital data signals may be sequentially inputted, whenthey are to be fetched by the latch (A) 102 b, to the latches of thestages owned by the latch (A) 102 b. However, the invention should notbe limited to the construction. This construction may be made by theso-called “divisional drive”, in which the latches of the stages ownedby the latch (A) 102 b are divided into several groups so that thedigital data signals may be simultaneously inputted in parallel with theindividual groups. Here, the number of the groups will be called the“dividing number”. Where the latches are grouped for individual fourstages, for example, it is said that the divided drive is performed byfour.

[0054] The time period till the digital data signals are completelywritten in the latches of all stages of the latch (A) 102 b will becalled the “line period”. Specifically, the line period is the timeinterval from the instant when the writing of the digital data signalsin the latch at the most lefthand side of the latch (A) 102 b to theinstant when the writing of the digital data signals in the latch of themost righthand side is ended. As a matter of fact, the line period maycontain the period which is the sum of the line period and thehorizontal flyback period.

[0055] When one line period is ended, a latch signal is fed to the latch(B) 102 c. At this instant, the digital data signals, as written andlatched in the latch (A) 102 b, are transmitted all at once to the latch(B) 102 c so that they are written and latched in the latches of allstages of the latch (B) 102 c.

[0056] In the latch (A) 102 b having transmitted the digital datasignals to the latch (B) 102 c, on the basis of the timing signal fromthe shift register 102 a, there are sequentially written the digitaldata signals which are fed again from the time-division gradation datasignal generating circuit 104.

[0057] For this one line period of the second round, the digital datasignals, as written and latched in the latch (B) 102 b, are inputted tothe source signal line. In the invention, this source signal line isconnected with a switching circuit 105.

[0058] With this switching circuit 105, on the other hand, there is alsoconnected a current feed line which is connected with a power source106. In response to a switching signal inputted to the switching circuit105, the wiring line connecting the switching circuit 105 and a pixelelectrode is switched to the source signal line or the current supplyline.

[0059] On the other hand, the switching signal switches the adjoiningwiring lines alternately into the source signal line and the currentsupply line. In other words, both the adjoining wiring lines are not thesource signal line or the current supply line.

[0060] Where the wiring line connected with the switching TFT of thepixel is connected with the source signal line, the pixel having thatswitching TFT exhibits the luminescence or not in response to thedigital data signal inputted from the source signal line driver circuit.Where the wiring line connected with the switching TFT of the pixel isconnected with the current supply line, however, the pixel having theswitching TFT does not function.

[0061] Where the wiring line connected with the current controlling TFTof the pixel is connected with the current supply line, on the otherhand, the pixel having the current controlling TFT exhibits theluminescence or not in response to the digital data signals inputtedfrom the source signal line driver circuit. Where the wiring lineconnected with the current controlling TFT of the pixel is connectedwith the source signal line, however, the pixel having the currentcontrolling TFT does not function.

[0062] On the other hand, the gate signal line driver circuit 103 has ashift register and a buffer (although neither shown). As the case maybe, the gate signal line driver circuit 103 may have a level shifter inaddition to the shift register and the buffer.

[0063] In the gate signal line driver circuit 103, the timing signalfrom the (not-shown) shift register is fed to the (not-shown) buffer andis fed to the corresponding gate signal line (which may also be calledthe “scanning line”). The gate signal line is connected with the gateelectrode of the pixel TFT of one line, and all the pixel TFTs of oneline have to be simultaneously turned ON. Therefore, the buffer to beused has to allow a high current to flow.

[0064] In the time-division gradation data signal generating circuit104, the analog or digital video signals (containing graphicinformation) are converted into digital data signals for thetime-division gradations and are inputted to the latch (A) 102 b. On theother hand, this time-division gradation data signal generating circuit104 also generates timing pulses or the like necessary for thetime-division gradation displays.

[0065] This time-division gradation data signal generating circuit 104may also be disposed outside of the light-emitting device of theinvention. In this case, the construction is changed such that thedigital data signals generated in the circuit 104 are inputted to thelight-emitting device of the invention. In this case, the electricdevice (or the light-emitting device) having the light-emitting deviceof the invention as a display device contains the light-emitting deviceof the invention and the time-division gradation data signal generatingcircuit as separate parts.

[0066] On the other hand, the time-division gradation data signalgenerating circuit 104 may be packaged in the form of an IC chip on thelight-emitting device of the invention. In this case, the constructionis modified such that the digital data signals generated by the IC chipare inputted to the light-emitting device of the invention. In thiscase, the electric device having the light-emitting device of theinvention as the display device contains the light-emitting device ofthe invention, on which the IC chip containing the time-divisiongradation data signal generating circuit packaged, as its parts.

[0067] Finally, the time-division gradation data signal generatingcircuit 104 can be formed by using the TFT over the substrate common tothe pixel portion 101, the source signal line driver circuit 102 and thegate signal line driver circuit 103. In this case, all the video signalscontaining the graphic information can be processed, if inputted to thelight-emitting device, over the substrate. The time-division gradationdata signal generating circuit of this case can also be formed of theTFT which has a poly-silicon film as an active layer. In this case, onthe other hand, the electric device having the light-emitting device ofthe invention as its display device is enabled to reduce its size byhaving the time-division gradation data signal generating circuit in thelight-emitting device itself.

[0068] On the other hand, the construction of the source signal linedriver circuit 102, as exemplified in this embodiment, is just one modeof embodiment but should not limit the construction of the invention.

[0069] Here will be described a structure of the pixel unit in thelight-emitting device of the invention. The pixel portion 101 shown inFIG. 1 is shown in an enlarged scale in FIG. 4A. In FIG. 4A, the pixelportion 101 is provided with wiring lines (P1 to Px) for source signallines (S1 to Sx) or current supply lines (V1 to Vx), and gate signallines (G1 to Gy).

[0070] Here, a pixel 107 is located at the region which is composedindividual one of the source signal lines (S1 to Sx), the current supplylines (V1 to Vx) and the gate signal lines (G1 to Gy). In the pixelportion 101, the plurality of pixels 107 are arranged in a matrix shape.

[0071] Outside of the pixel portion 101 of FIG. 4A, on the other hand,there is disposed the switching circuit 105. It is determined by aswitching signal (C) to be fed to the switching circuit 105 whether thewiring lines (P1 to Px) to be connected with the individual pixels fromthe switching circuit 105 are directed to the source signal lines (S1 toSx) or the current supply lines (V1 to Vx).

[0072] Here, FIG. 4B shows the switching signal inputted to theswitching circuit 105 and the behavior, in which the wiring lines (P1 toPx) are alternatively for every one frame period by the switching signalfor the source signal lines (S1 to Sx) and the current supply lines (V1to Vx), by taking the wiring lines (Px-1) and Px in FIG. 4A. On theother hand, the pixel column having the wiring lines (Px-1) and Px willbe called herein as the “(x-1)-th pixel column”, and the pixel columnhaving the wiring lines (Px-2) and (Px-1) will be called herein as the“(x-2)-th pixel column”.

[0073] However, here is shown one example of the switching signals forthe first to third frame periods, which should not limit the invention.

[0074] In this embodiment, either the drain region or the source regionof the switching TFT is electrically connected with the source signalline and the source region of the current controlling TFT of theadjoining pixel.

[0075] When either the drain region or the source region of theswitching TFT in the pixels of the (x-2)-th column is electricallyconnected with the source signal line, more specifically, either thesource region or the drain region of the switching TFT in the pixels ofthe (x-1)-th column is electrically connected with the current supplylines of the pixels of the (x-2)-th column.

[0076] Next, a region 108 including the pixel 107 and the switchingcircuit 105 is shown in an enlarged scale in FIG. 5. In FIG. 5, numeral501 designates a switching TFT. A gate electrode of the switching TFT501 is connected with a gate signal line G (G1 to Gx). One of the sourceregion and the drain region of the switching TFT 501 is connected withthe source signal line S (S1 to Sx) or the current supply line V (V1 toVx), whereas the other is connected with the gate electrode of a currentcontrolling TFT 502 and a capacitor 503 owned by each pixel.

[0077] However, this pixel does not function where the switching TFT 501is connected by the switching circuit 105 with the current supply line.

[0078] The capacitor 503 is provided for retaining the gate voltage(i.e., the potential difference between the gate electrode and thesource region) of the current controlling TFT 502 when the switching TFT501 is in the unselected state (or OFF state). Here is shown theconstruction having the capacitor 503, to which the invention should notbe limited, but the construction may be modified not to have thecapacitor 503.

[0079] On the other hand, one of the source region and the drain regionof the current controlling TFT 502 is connected with the current supplyline V (V1 to Vx) or the source signal line S (S1 to Sx), whereas theother is connected with an EL element 504. Here, the current supply lineV is connected with the capacitor 503.

[0080] However, this element does not function where the currentcontrolling TFT 502 is connected by the switching circuit 105 with thesource signal line S (S1 to Sx).

[0081] The EL element 504 is formed of an EL layer between an anode anda cathode. Where the anode is connected with the source region or thedrain region of the current controlling TFT 502, the anode acts as thepixel electrode whereas the cathode acts as the opposed electrode. Wherethe cathode is connected with the source region or the drain region ofthe current controlling TFT 502, on the contrary, the cathode acts asthe pixel electrode whereas the anode acts as the opposed electrode.

[0082] The EL electrode 504 is fed at its opposed electrode with anopposed potential. On the other hand, the current supply line V is fedwith the supply potential. These supply potential and opposed potentialare fed by the power source which is provided in the light-emittingdevice of the invention by an external IC or the like.

[0083] The switching TFT 501 and the current controlling TFT 502 to beused may either an n-channel TFT or a p-channel TFT. Where the sourceregion or the drain region of the current controlling TFT 502 isconnected with the anode of the EL element 504, the current controllingTFT 502 is desired to be the p-channel TFT. Where the source region orthe drain region of the current controlling TFT 502 is connected withthe cathode of the EL element 504, on the other hand, the currentcontrolling TFT 502 is desired to be the n-channel TFT.

[0084] On the other hand, the switching TFT 501 and the currentcontrolling TFT 502 should not be limited to have the single-gatestructure but may have a multi-gate structure such as a double-gatestructure or a triple-gate structure.

[0085] The drive method of the light-emitting device of the inventionhaving the aforementioned construction will be described with referenceto FIG. 6. In FIG. 6, there is illustrated a display period of pixels ofthe first line of the case in which a time (Time) is taken on anabscissa whereas a position (V-scan) of a gate signal line is taken onan ordinate.

[0086] Here is presented an example of the case in which the sourcesignal line S (S1 to Sx) is connected with the source region of theswitching TFT by the switching circuit 105 whereas the current supplyline V (V1 to Vx) is connected with one current controlling TFT.

[0087] At first, the supply potential of the current supply line isequal to the potential of the opposed electrode of the EL element. Thegate signal is then inputted from the gate signal line driver circuit tothe gate signal line G. As a result, there are turned ON the switchingTFTs 501 of all the pixels (i.e., the pixels of the first line) whichare connected with the gate signal line G1.

[0088] Simultaneously with this, the digital video signal of the firstbit is inputted from the source signal line driver circuit to the sourcesignal line (S1 to Sx) which is electrically connected with the sourcesignal line driver circuit switched by the switching circuit 105. Thedigital video signal is inputted through the switching TFT 501 to thegate electrode of the current controlling TFT 502.

[0089] Simultaneously as the input of the gate signal to gate signalline G1 is ended, the gate signal is likewise inputted to the gatesignal line G2. Then, the switching TFTs 501 of all the pixels, asconnected with the gate signal line G2, are turned ON, and the digitalvideo signal of the first bit is inputted from the source signal line(S1 to Sx), which is electrically connected with the source signal linedriver circuit by the switching circuit, to the pixels of the secondline.

[0090] Then, the gate signal is inputted sequentially to all the gatesignal lines (G1 to Gx). The time period, for which all the gate signallines (G1 to Gx) are selected so that the digital video signal of thefirst bit is inputted to the pixels of all the lines, is the “writeperiod Ta1”.

[0091] When the write period Ta1 is ended, the “display period Tr1” isthen started. For this display period Tr1, the supply potential of thecurrent supply line has such a potential difference from the opposedelectrode that the EL element may luminesce when the supply potential isfed to the pixel electrode of the EL element.

[0092] In this embodiment, moreover, the current controlling TFT 502 isOFF where the digital video signal has information “0”. Therefore, thesupply potential is not fed to the pixel electrode of the EL element504. As a result, the EL element 504, to which the digital video signalhaving the information “0” is inputted, does not luminesce.

[0093] In the case of information “1”, on the contrary, the currentcontrolling TFT 502 is ON. Therefore, the supply potential is fed to thepixel electrode of the EL element 504. As a result, the EL element 504,to which the digital video signal having the information “1” isinputted, luminesce.

[0094] Thus, for the display period Tr1, the EL element 504 does or doesnot luminesce, and all the pixels display. The time period, for whichthe pixels are displaying, will be called the “display period Tr”.Especially, the display period, which is started when the digital videosignal of the first bit is inputted to the pixels, is called the “Tr1”.In order to simplify the description, FIG. 6 shows only the displayperiod of the pixels of the first line. The timings for the displayperiods of all the lines are identical.

[0095] When the display period Tr1 is ended, a write period Ta2 isstarted, and the supply potential of the current supply line is equal tothe potential of the opposed electrode of the EL element. As in the caseof the write period Ta1, moreover, all the gate signal lines aresequentially selected so that the digital video signal of the second bitis inputted all the pixels. The time period till the digital videosignal of the second bit is inputted to the pixels of all the lines iscalled the “write period Ta2”.

[0096] When the write period Ta2 is ended, a write period Ta2 isstarted, and the supply potential of the current supply line takes alevel to establish such a potential difference from the opposedelectrode that the EL element luminesce when the supply potential is fedto the pixel electrode of the EL element. Then, all the pixels performdisplays.

[0097] The aforementioned actions are repeated till the digital videosignals of the n-th bit are inputted to the pixels, so that the writeperiod Ta and the display period Tr repeat their appearances. When allthe display periods (Tr1 to Trn) end, one image can be displayed. In thedrive method of the invention, one period for displaying one image iscalled “one frame period (F)”. When the one frame period is ended, thenext frame period is started. Then, the write period Ta1 appears againto repeat the aforementioned actions.

[0098] In the light-emitting device of the invention, it is preferablethat 120 or more frame periods are prepared for 1 second, and that oneframe period is 1/240 to 1/120 seconds, that is, frame frequency is 120to 240 Hz. If the number of images to be displayed for 1 second is lessthan 120, the flicker may begin to become visually prominent.

[0099] In the invention, it is necessary that the sum of the durationsof all the write periods is shorter than one frame period, and that theduration ratios of the display periods are Tr1: Tr2: Tr3: - - - :Tr(n−1): Trn=2⁰: 2¹: 2²: - - - : 2^((n-2)): 2^((n-1)). By thiscombination of display periods, it is possible to display a desired oneof the 2^(n) gradations.

[0100] By determining the sum of the durations of the display periodsfor which the EL element is luminescing for one frame period, there isdetermined the gradation which is displayed by the pixel for the frameperiod. If the luminance of the case in which the pixel luminesces forall the display periods is 100% for n=8, for example, a luminance of 1%can be expressed where the pixels luminesce for Tr1 and Tr2. Where Tr3,Tr5 and Tr8 are selected, it is possible to express a luminance of 60%.

[0101] On the other hand, the display periods Tr1 to Trn may be made toappear in any sequence. For one frame period, for example, the displayperiods can be made to appear in the sequence of Tr1 and then Tr3, Tr5,Tr2, - - - , and so on.

[0102] Here, the level of the supply potential of the current supplyline is changed between for the write period and for the display period,but the invention should not be limited thereto. The potentialdifference to allow the EL element to luminesce when fed at its pixelelectrode with the supply potential may always be retained at the supplypotential and the opposed electrode. Then, the EL element can luminesceeven for the write period. Therefore, the gradation of the display to bemade by the pixel for the frame period is determined by the sum of thedurations of the write period and the display period for the EL elementto luminesce for one frame period. In this case, the ratios of the sumsof the durations of the write period and the display period, ascorresponding to the digital bit signals of the individual bits, have tobe (Ta1+Tr1): (Ta2+Tr2): (Ta3+Tr3): - - - : (Ta(n−1)+Tr(n−1)):(Tan+Trn)=2⁰: 2¹: 2²: - - - : 2^((n-2)): 2^((n-1)). The upper facestructure of the pixel unit, as has been described in connection withthe mode of embodiment of the invention, will be further described withreference to FIG. 7.

[0103] In FIG. 7, a wiring line 701 is a gate wiring line for connectingthe gate electrode of the switching TFT 702 electrically. On the otherhand, the source region 702 a of the switching TFT 702 is connected witha source wiring line 703 and at its drain region 702 b with a drainwiring line 704. On the other hand, this drain wiring line 704 iselectrically connected with the gate electrode 705 a of a currentcontrolling TFT 705. On the other hand, the source region 705 c of thecurrent controlling TFT 705 is electrically connected with a currentsupply line 706 and at its drain region 705 c with a drain wiring line707.

[0104] At this time, a storage capacitor is formed in a region 708. Thisstorage capacitor 708 is formed between a semiconductor film 709electrically connected with the current supply line 706 and a wiringline for forming a (not-shown) insulating film in the common layer ofthe gate insulating film and the gate electrode 705 a. Here, thesemiconductor film 709 is formed separately of the semiconductor film tobe formed at the time of making the switching TFT and the currentcontrolling TFT, so that it will be called herein the “separatesemiconductor film”. As shown in FIG. 7, more specifically, the separatesemiconductor film 709 is isolated from the active layer for forming thesource region 702 a and the drain region 702 b of the switching TFT 702and the source region 705 b and the drain region 705 c of the currentcontrolling TFT 705. In the region designated by 708, the separatesemiconductor film 709 overlaps the gate electrode 705 a across the gateinsulating film, to make a structure in which 60% or more of theseparate semiconductor film 709 overlaps the wiring line forming thegate electrode 705 a. In another structure, 60% or more of the separatesemiconductor film 709 overlaps the current supply line 706 across thefirst layer insulating film. On the other hand, the capacitor, which isformed by the gate electrode 705 a, the same (not-shown) layer as thefirst layer insulating film and the current supply line 706, can also beused as the storage capacitor.

[0105] In this embodiment, the pixel structure shown in FIG. 7 shouldnot limit the invention in the least but provides just one preferredexample. It is relied upon the suitable design of the practitioner wherethe switching TFT, the current controlling TFT or the storage capacitoris to be formed.

[Embodiment 1]

[0106] Here will be described the construction of the switching circuitto be used in the invention, with reference to FIGS. 2 and 3A and 3B.The reference numerals used in FIGS. 2 and 3A and 3B can be suitablyreferred to those in FIG. 1.

[0107] In FIG. 2, the switching circuit 105 is provided with twotransmission gates, as discriminated by a transmission gate 1 (201) anda transmission gate 2 (202).

[0108] Moreover, the transmission gate 1 (201) is connected with thesource signal line S (203), and the transmission gate 2 (202) isconnected with a current supply line 204.

[0109] On the other hand, a source signal line 205 is connected with thetransmission gate 1 (201) and the transmission gate 2 (202), and thecircuit is constructed such that a switching signal from a switchingsignal generating circuit 206 and an inverted switching signal invertedfrom the switching signal by an inverter 207 are inputted to thetransmission gate 1 (201) and the transmission gate 2 (202),respectively.

[0110] On the other hand, the switching signal to be inputted from theswitching signal generating circuit 206 has the information “0” or “1”,and one of the switching signals “0” and “1” has a “Hi” voltage whereasthe other has a “Lo” voltage.

[0111] In this embodiment, where the switching signal has theinformation “0”, the transmission gate 1 (201) is ON whereas thetransmission gate 2 (202) is OFF, as shown in FIG. 3A. As a result, thetransmission gate 1 (201) is ON so that the signal from the sourcesignal line driver circuit 102 is inputted to the transmission gate 1(201), and so that the signal from the source signal line driver circuit102 is inputted to a wiring line 208 which is connected from thetransmission gate 1 (201) and the transmission gate 2 (202) to a pixelportion 101. At this time, the wiring line 208 performs the function ofthe source signal line.

[0112] At this time, where the wiring line 208 acting as the sourcesignal line is connected with a switching TFT 301 a of a pixel 107 a, asshown in FIG. 3A, an EL element 302 a in the pixel 107 a using thewiring line 208 as the source signal line exhibits the luminescence ornot in response to the digital video signal inputted from the sourcesignal line driver circuit 102.

[0113] Thus, the EL element to be caused to luminesce in response to thedigital video signal inputted from the source signal line driver circuit102 will be called herein as the “selected (state) pixel”.

[0114] Where the wiring line 208 acting as the source signal line isconnected with a current controlling TFT 303 b of a pixel 107 b, asshown in FIG. 3A, no signal is inputted to the pixel 107 b to bring thepixel 107 b into an unselected state.

[0115] Where the switching signal has the information “1”, on thecontrary, the transmission gate 1 (201) is OFF, as shown in FIG. 3B,whereas the transmission gate 2 (202) is ON. As a result, thetransmission gate 2 (202) is ON so that the signal is inputted from thepower source 106 by the current supply line 205, and the signal from thepower source 106 is inputted from the transmission gate 2 (202) to thewiring line 208 connected with the pixel portion 101. In short, thewiring line 208 acts as the current supply line.

[0116] At this time, where the wiring line 208 acting as the currentsupply line is connected at a pixel 107 c with the current controllingTFT, as shown in FIG. 3B, an EL element 302 c at the pixel 107 c havingthe wiring line 208 as the current supply line exhibits the luminescenceor not in response to the digital video signal inputted from the sourcesignal line driver circuit 102. At this time, the pixel 107 c isselected.

[0117] Where the wiring line 208 acting as the current supply line isconnected with the switching TFT 301 d of a pixel 107 d, as shown inFIG. 3B, this pixel 107 d is fed with no signal and is in the unselectedstate.

[0118] Here, when a pixel is selected, all the pixel columns connectedwith the same wiring line, as taken longitudinally toward the Drawing,are selected. When a pixel is not selected, on the contrary, none of thepixel columns connected with the same wiring line, as takenlongitudinally toward the Drawing, is selected.

[0119] By switching the pixel columns to be selected for one frame, thesource signal line and the current supply line may be alternatelyinterchanged in the electric manner.

[0120] For example, therefore, the odd pixel columns, i.e., the first,third and fifth pixel columns can be selected from the lefthand side inthe first frame, and the even pixel columns, i.e., the second, fourthand sixth pixel columns can be selected from the lefthand side in thesecond frame.

[Embodiment 2]

[0121] Here will be described a different structure of the pixel unitfrom the aforementioned one and a drive method of the pixel unitstructure, when the light-emitting device having the different pixelunit structure is used in the invention. The description is made on thecase in which the display of 2^(n) gradations is made by the digitaldata signal of n bits.

[0122]FIG. 8 shows one example of the block diagram in thelight-emitting device of the invention. The light-emitting device ofFIG. 8 is provided with a pixel portion 801 of the TFT formed over asubstrate, a source signal line driver circuit 802, and a writing gatesignal line driver circuit (or a first gate signal line driver circuit)803 and an erasing gate signal line driver circuit (or a second gatesignal line driver circuit) 804 arranged in the periphery of the pixelunit. In this embodiment, the light-emitting device has one sourcesignal line driver circuit but may have two source signal line drivercircuits in the invention.

[0123] In the invention, on the other hand, the source signal linedriver circuit 802 and the writing gate signal line driver circuit 803or the erasing gate signal line driver circuit 804 may be constructed tooverlie the substrate having the pixel portion 801 but may also beconstructed to be formed over an IC chip and connected with the pixelportion 801 through an FPC or TAB.

[0124] The source signal line driver circuit 802 is basically composedof a shift register 802 a, a latch (A) 802 b and a latch (B) 802 c.

[0125] In the source signal line driver circuit 802, a clock signal(CLK) and a start pulse (SP) are inputted to the shift register 802 a.On the basis of those clock signal (CLK) and start pulse (SP), the shiftregister 802 a generates timing signals sequentially and feeds themsequentially to a circuit at the subsequent stage through a (not-shown)buffer or the like.

[0126] The timing signal from the shift register 802 a is buffed andamplified by the buffer or the like. The wiring line to be fed with thetiming signal is connected with many circuits or elements so that itsload capacity (or parasitic capacity) is high. The buffer is providedfor preventing the “bluntness” of the rise or fall of the timing signal,as caused because of the high load capacity.

[0127] The timing signal thus buffed and amplified by the buffer is fedto the latch (A) 802 b. This latch (A) 802 b is composed of latches of aplurality of stages for processing n-bit digital data signals. Inresponse to the timing signal, the latch (A) 802 b fetches and latchesthe n-bit digital data signals, as fed from the time-division gradationdata signal generating circuit 805, sequentially.

[0128] Here, the digital data signals may be sequentially inputted, whenthey are to be fetched by the latch (A) 802 b, to the latches of thestages owned by the latch (A) 802 b. However, the invention should notbe limited to the construction. This construction may be made by theso-called “divided drive”, in which the latches of the stages owned bythe latch (A) 802 b are divided into several groups so that the digitaldata signals may be simultaneously inputted in parallel with theindividual groups. Here, the number of the groups will be called the“dividing number”. Where the latches are grouped for individual fourstages, for example, it is said that the divided drive is performed byfour.

[0129] The time period till the digital data signals are completelywritten in the latches of all stages of the latch (A) 802 b will becalled the “line period”. Specifically, the line period is the timeinterval from the instant when the writing of the digital data signalsin the latch at the most lefthand side of the latch (A) 802 b to theinstant when the writing of the digital data signals in the latch of themost righthand side is ended. As a matter of fact, the line period maycontain the period which is the sum of the line period and thehorizontal flyback period.

[0130] When one line period is ended, a latch signal is fed to the latch(B) 802 c. At this instant, the digital data signals, as written andlatched in the latch (A) 802 b, are transmitted all at once to the latch(B) 802 c so that they are written and latched in the latches of allstages of the latch (B) 802 c.

[0131] In the latch (A) 802 b having transmitted the digital datasignals to the latch (B) 802 c, on the basis of the timing signal fromthe shift register 802 a, there are sequentially written the digitaldata signals which are fed again from the time-division gradation datasignal generating circuit 805.

[0132] For this one line period of the second round, the digital datasignals, as written and latched in the latch (B) 802 c, are inputted tothe source signal line.

[0133] Here, the source signal line is electrically connected with aswitching circuit 806. On the other hand, the (not-shown) current supplyline connected with a power source 807 is likewise electricallyconnected with the switching circuit 806. Of the source signal line andthe current supply line, moreover, the line selected by the switchingsignal for controlling the switching circuit 806 is electricallyconnected with the pixel of the pixel portion 801.

[0134] In FIG. 8, the region containing the pixel 808 of the pixelportion 801 and the switching circuit 806 are designated by 809.

[0135] On the other hand, each of the writing gate signal line drivercircuit 803 and the erasing gate signal line driver circuit 804 has ashift register and a buffer (although neither shown). As the case maybe, the writing gate signal line driver circuit 803 and the erasing gatesignal line driver circuit 804 may have a level shifter in addition tothe shift register and the buffer.

[0136] In the writing gate signal line driver circuit 803 and theerasing gate signal line driver circuit 804, the timing signal from the(not-shown) shift register is fed to the (not-shown) buffer and is fedto the corresponding gate signal line (which may also be called the“scanning line”). The gate signal line is connected with the gateelectrode of the pixel TFT of one line, and all the pixel TFTs of oneline have to be simultaneously turned ON. Therefore, the buffer to beused has to allow a high current to flow.

[0137] In the time-division gradation data signal generating circuit805, the analog or digital video signals (containing graphicinformation) are converted into digital data signals for thetime-division gradations and are inputted to the latch (A) 802 b. On theother hand, this time-division gradation data signal generating circuit805 also generates timing pulses or the like necessary for thetime-division gradation displays.

[0138] This time-division gradation data signal generating circuit 805may also be disposed outside of the light-emitting device of theinvention. In this case, the construction is changed such that thedigital data signals generated in the circuit 104 are inputted to thelight-emitting device of the invention. In this case, the electricdevice (or the light-emitting device) having the light-emitting deviceof the invention as a display contains the light-emitting device of theinvention and the time-division gradation data signal generating circuitas separate parts.

[0139] On the other hand, the time-division gradation data signalgenerating circuit 805 may be packaged in the form of an IC chip on thelight-emitting device of the invention. In this case, the constructionis modified such that the digital data signals generated by the IC chipare inputted to the light-emitting device of the invention. In thiscase, the electric device having the light-emitting device of theinvention as the display contains the light-emitting device of theinvention, on which the IC chip containing the time-division gradationdata signal generating circuit packaged, as its parts.

[0140] Finally, the time-division gradation data signal generatingcircuit 805 can be formed by using the TFT over the substrate common tothe pixel portion 801, the source signal line driver circuit 802, thewriting gate signal line driver circuit 803 and the erasing gate signalline driver circuit 804. In this case, all the video signals containingthe graphic information can be processed, if inputted to thelight-emitting device, over the substrate. The time-division gradationdata signal generating circuit of this case can also be formed of theTFT which has a poly-silicon film as an active layer. In this case, onthe other hand, the electric device having the light-emitting device ofthe invention as its display is enabled to reduce its size by having thetime-division gradation data signal generating circuit in thelight-emitting device itself.

[0141] The pixel portion 801 is shown in an enlarged scale in FIG. 9.This pixel portion 801 is provided with: source signal lines (S1 to Sx)connected with the latch (B) 802 c of the source signal line drivercircuit 802; current supply lines (V1 to Vx) connected through an FPCwith the power source outside of the light-emitting device; writing gatesignal lines (or first gate signal lines) (Ga1 to Gay) connected withthe writing gate signal line driver circuit 803; and erasing gate signallines (or second gate signal lines) connected with the erasing gatesignal line driver circuit 804.

[0142] Here, the wiring lines (P1 to Px) for connecting the switchingcircuit 806 and the pixels are switched to the source signal lines (S1to Sx) or the current supply lines (V1 to Vx) by the switching circuit806 which is disposed outside of the pixel portion 801.

[0143] A pixel 901 is the region which is provided with the sourcesignal lines (S1 to Sx), the current supply lines (V1 to Vx), thewriting gate signal lines (Ga1 to Gay) and the erasing gate signal lines(Ge1 to Gey). In the pixel portion 801, a plurality of pixels 901 arearrayed in the matrix shape.

[0144] The region 809 including the pixel 901 and the switching circuitis shown in an enlarged scale in FIG. 10. In FIG. 10, numeral 1001designates a switching TFT. A gate electrode of the switching TFT 1001is connected with a writing gate signal line Ga (1007). One of thesource region and the drain region of the switching TFT 1001 isconnected with the source signal line S, whereas the other is connectedwith the gate electrode of a current controlling TFT 1002, a capacitor1003 owned by each pixel and the source region or the drain region of anerasing TFT 1004. However, this pixel does not function where theswitching TFT 1001 is connected by the switching circuit 806 with thecurrent supply line.

[0145] The capacitor 1003 is provided for retaining the gate voltage ofthe current controlling TFT 1002 when the switching TFT 1001 is in theunselected state (or OFF state). In this embodiment, there is shown theconstruction having the capacitor 1003, to which the invention shouldnot be limited, but the construction may be modified not to have thecapacitor 1003.

[0146] On the other hand, one of the source region and the drain regionof the current controlling TFT 1002 is connected with the current supplyline V, whereas the other is connected with an EL element 1005. Thecurrent supply line V is connected with the capacitor 1003. However,this element does not function where the current controlling TFT 1002 isconnected by the switching circuit 806 with the source signal line S (S1to Sx).

[0147] Of the source region and the drain region of the erasing TFT1004, on the other hand, the one which is not connected with the sourceregion or the drain region of the switching TFT 1001 is connected withthe current supply line V. Moreover, a gate electrode of the erasing TFT1004 is connected with an erasing gate signal line Ge (1008).

[0148] The EL element 1005 is composed of an anode, a cathode and an ELlayer formed between an anode and a cathode. Where the anode isconnected with the source region or the drain region of the currentcontrolling TFT 1002, the anode acts as the pixel electrode whereas thecathode acts as the opposed electrode. Where the cathode is connectedwith the source region or the drain region of the current controllingTFT 1002, on the contrary, the cathode acts as the pixel electrodewhereas the anode acts as the opposed electrode.

[0149] The EL electrode 1005 is fed at its opposed electrode with anopposed potential. Moreover, the potential difference between theopposed potential and the supply potential is always kept at such alevel for the EL element to luminesce when the supply potential is fedto the pixel electrode. These supply potential and opposed potential arefed by the power source which is provided in the light-emitting deviceof the invention by an external IC or the like. Here, the power sourcefor the opposed potential will be especially called the “opposed powersource 1006”.

[0150] The typical light-emitting device at the present stage isrequired to have a current of several mA/cm² per the area of the pixelunit where the luminescence per the luminescent area of the pixel is 200cd/m². As the screen size becomes the larger, therefore, it becomes themore difficult to control the level of the potential to be fed from thepower source of the IC, with the switch. In the invention, the supplypotential and the opposed potential are always kept constant, and thelevel of the potential to be fed from the power source of the IC neednot be controlled with the switch so that the invention is useful forrealizing a panel having a larger screen size.

[0151] In the invention, moreover, the supply potential is required tohave such a potential level as to turn OFF the current controlling TFT1002 when this TFT 1002 is fed at its gate electrode with the supplypotential.

[0152] The switching TFT 1001, the current controlling TFT 1002 and theerasing TFT 1004 to be used may either the n-channel TFT or thep-channel TFT. On the other hand, the switching TFT 1001, the currentcontrolling TFT 1002 and the erasing TFT 1004 should not be limited tohave the single-gate structure but may have a multi-gate structure suchas a double-gate structure or a triple-gate structure.

[0153] The drive method of the light-emitting device according to theinvention, as shown in FIGS. 8 to 10, will be described with referenceto FIG. 11.

[0154] At first, the writing gate signal line Ga1 (1007) is selectedwith a writing gate signal (or a first gate signal) to be inputted fromthe writing gate signal line driver circuit 803 to the writing gatesignal line Ga1 (1007). And, there are turned ON the switching TFTs 1001of all the pixels (i.e., the pixels of the first line) which areconnected with the wiring gate signal line Ga1.

[0155] Simultaneously with this, the digital video signal of the firstbit, as inputted from the source signal line driver circuit 802 to thesource signal lines S1 to Sx, is inputted through the switching TFT 1001to the current controlling TFT 1002. Here, it is to input the digitalvideo signal to the pixel that the digital video signal is inputtedthrough the switching TFT 1001 to the gate electrode of the currentcontrolling TFT 1002.

[0156] The digital video signal has the information “0” or “1”, and oneof the digital video signals “0” and “1” has a “Hi” voltage whereas theother has a “Lo” voltage.

[0157] In this embodiment, the current controlling TFT 1002 is OFF wherethe digital video signal has information “0”. Therefore, the supplypotential is not fed to the pixel electrode of the EL element 1005. As aresult, the EL element 1005, to which the digital video signal havingthe information “0” is inputted, does not luminesce.

[0158] Where the digital video signal has the information “1”, on thecontrary, the current controlling TFT 1002 is ON. Therefore, the supplypotential is fed to the pixel electrode of the EL element 1005. As aresult, the EL element 1005, to which the digital video signal havingthe information “1” is inputted, luminesce.

[0159] In this embodiment, where the digital video signal has theinformation “0”, the current controlling TFT 1002 is turned OFF. Wherethe digital video signal has the information “1”, the controlling TFT1002 is turned ON. However, the invention is not limited to thisconstruction. The current controlling TFT 1002 may be turned ON, wherethe digital video signal has the information “0”, and may be turned OFFwhere the digital video signal has the information “1”.

[0160] Thus, simultaneously with the input of the digital video signalto the pixels of the first line, the EL element 1005 does or does notluminesce, and the pixels of the first line display. The time period,for which the pixels are displaying, will be called the “display periodTr”. Especially, the display period, which is started when the digitalvideo signal of the first bit is inputted to the pixels, is called the“Tr1”. The timings at which the display periods of the individual linesare started have individual time differences.

[0161] Where the selection of the writing gate signal line Ga1 is ended,the writing gate signal line Ga2 is selected with the writing gatesignal. Then, the switching TFTs 1001 of all the pixels connected withthe writing gate signal line Ga2 are turned ON, so that the digitalvideo signals of the first bit are inputted to the pixels of the secondline from the source signal lines S1 to Sx.

[0162] Then, all the writing gate signal lines Ga (Ga1 to Gay) aresequentially selected so that the digital video signals of the first bitare inputted to all the pixels. The time period till the digital videosignals of the first bit are inputted to all the pixels is the writingperiod Ta1.

[0163] Before the digital video signals of the first bit are inputted toall the pixels, that is, before the writing period Ta1 is ended, on theother hand, the erasing gate signal line Ge1 (1008) is selected inparallel with the inputting of the digital video signals of the firstbit to the pixels, with the erasing gate signal (or the second gatesignal) which is inputted from the erasing gate signal line drivercircuit 804 to the erasing gate signal line Ge1 (1008). Then, theerasing TFT 1004 of all the pixels (i.e., the pixels of the first line)connected with the erasing gate signal line Ge1 (1008) is turned ON.Then, the supply potential of the current supply lines V1 to Vx is fedto the gate electrode of the current controlling TFT 1002 through theerasing TFT 1004.

[0164] When the supply potential is fed to the gate electrode of thecurrent controlling TFT 1002, the gate electrode and the source regionof the current controlling TFT 1002 take the same potential so that thegate voltage is at 0 V. The current controlling TFT 1002 is turned OFF.Specifically, the digital video signal, which has been retained by thegate electrode of the current controlling TFT after the writing gatesignal line Gal (1007) was selected with the writing gate signal, iserased by applying the supply potential to the gate electrode of thecurrent controlling TFT. As a result, the supply potential is notapplied to the pixel electrode of the EL element 1005, and none of theEL elements 1005 owned by the pixels of the first line luminesces sothat the pixels of the first line do not display.

[0165] The period for which the pixels are not displaying is called the“non-display period Td”. Simultaneously as the erasing gate signal lineGel (1008) is selected in the pixels of the first line, the displayperiod Tr1 is ended to a non-display period Td1. Like the displayperiod, the timings at which the non-display periods of the individuallines have time differences.

[0166] When the selection of the erasing gate signal line Ge1 (1008) isended, moreover, the erasing gate signal line Ge2 is selected so thatthe erasing TFT 1004 of all the pixels (i.e., the pixels of the secondline) connected with the erasing gate signal line Ge2 is turned ON.Then, the supply potential of the current supply lines V1 to Vx is fedthrough the erasing TFT 1004 to the gate electrode of the currentcontrolling TFT 1002. When the supply potential is fed to the gateelectrode of the current controlling TFT 1002, this current controllingTFT 1002 is turned OFF. The supply potential is not fed to the pixelelectrode of the EL element 1005. As a result, none of the EL elementsowned by the pixels of the second line luminesces to establish the statein which the pixels of the second line do not luminesce.

[0167] Then, the erasing gate signal is inputted sequentially to all theerasing gate signal lines. The time period till all the erasing gatesignal lines Ge1 to Gey are selected so that the digital video signalsof the first bit retained by all the pixels are erased is the “erasureperiod Te1”.

[0168] Before the digital video signals of the first bit retained by allthe pixels are erased, that is, before the erasure period Te1 is ended,on the other hand, the writing gate signal line Gal is selected againwith the writing gate signal in parallel with the erasure of the digitalvideo signals of the first bit retained by the pixels. Then, the digitalvideo signals of the second bit are inputted to the pixels of the firstline. As a result, the pixels of the first line display again so thatthe non-display period Td1 is ended to the display period Tr2.

[0169] Likewise, all the writing gate signal lines are sequentiallyselected so that the digital video signals of the second bit areinputted to all the pixels. The period till the digital video signalsare completely inputted to all the pixels is called the “writing periodTa2”.

[0170] Before the digital video signals of the second bit are inputtedto all the pixels, that is, before the writing period Ta2 is ended, onthe other hand, the erasing gate signal line Ge2 is selected with theerasing gate signal in parallel with the inputting of the digital videosignals of the second bit to the pixels. Therefore, none of the ELelements owned by the pixels of the first line luminesces so that thepixels of the first line do not display. Therefore, the display periodTr2 is ended in the pixels of the first line to a non-display periodTd2.

[0171] Then, all the erasing gate signal lines Ge1 to Gey aresequentially selected so that the digital video signals of the secondbit retained in all the pixels are erased. The time period till thedigital video signals of the second bit retained by all the pixels areerased is the “erasure period Te2”.

[0172] The aforementioned actions are repeated till the digital videosignals of the m-th bit are inputted to the pixels, so that the displayperiod Tr and the non-display period Td repeat their appearances. Thedisplay period Tr1 continues from the start of the writing period Ta1 tothe start of the erasure period Te1. On the other hand, the non-displayperiod Td1 continues from the start of the erasure period Te1 to thestart of the writing period (i.e., the writing period Ta2 in this case)to next appear. Moreover, the display periods Tr2, Tr3, - - - , andTr(m−1) and the non-display periods Td2, Td3, - - - , and Td(m−1) areindividually determined like the display period Tr1 and the non-displayperiod Td1 by the writing period Ta1, Ta2, - - - , and Tam and theerasure periods Te1, Te2, - - - , and Te(m−1).

[0173] For conveniences of the description, FIG. 11 exemplifies the caseof m=n−2. However, it is natural that the invention should not belimited thereto. In the invention, the value from 1 to n can bearbitrarily selected for m.

[0174] When the digital video signals of the m-th [(n−2)-th (thefollowing parenthesized case is for m=n−2) bit are inputted to thepixels of the first line, these pixels of the first line display for thedisplay period Trm[n−2]. Then, the digital video signals of them[n−2]-th bit are retained in the pixels till the digital video signalsof the next bit are inputted.

[0175] When the digital video signals of the (m+1)[n−1]-th bit are theninputted to the pixels of the first line, the digital video signals ofthe m[n−2]-th bit retained in the pixels are rewritten to the digitalvideo signals of the (m+1)[n−1]-th bit. Then, the pixels of the firstline are displayed for the display period Tr(m+1)[n−1]. The digitalvideo signals of the (m+1)[n−1]-th bit are retained in the pixels tillthe digital video signals of the next bit are inputted.

[0176] The aforementioned actions are repeated till the digital videosignals of the n-th bit are inputted to the pixels. The display periodsTrm[n−2], - - - , and Trn continue from the starts of the writingperiods Tam[n−2], - - - , and Tan to the starts of the writing periodsto next appear.

[0177] When all the display periods Tr1 to Tm are ended, one image canbe displayed. In the invention, the period for one image to be displayedis called the “one frame period (F)”.

[0178] After the end of one frame period, moreover, the writing gatesignal line Ga1 is selected again with the writing gate signal. Then,the digital video signals of the first bit are inputted to the pixels sothat the pixels of the first one take again the display period Tr1.Then, the aforementioned actions are repeated again.

[0179] In the light-emitting device, it is preferable that 60 or moreframe periods are prepared for 1 second. If the number of images to bedisplayed for 1 second is less than 60, the flicker may begin to becomevisually prominent.

[0180] In the invention, on the other hand, it is important that the sumof the durations of all the write periods is shorter than one frameperiod. Moreover, it is necessary that the durations of the displayperiods are Tr1: Tr2: Tr3: - - - : Tr(n−1): Trn=2⁰: 2¹: 2²: - - - :2^((n-2)): 2^((n-1)). By this combination of display periods, it ispossible to display a desired one of the 2 ^(n) gradations.

[0181] By determining the sum of the durations of the display periodsfor which the EL element is luminescing for one frame period, there isdetermined the gradation which is displayed by the pixel for the frameperiod. If the luminance of the case in which the pixel luminesces forall the display periods is 100% for n=8, for example, a luminance of 1%can be expressed where the pixels luminesce for Tr1 and Tr2. Where Tr3,Tr5 and Tr8 are selected, it is possible to express a luminance of 60%.

[0182] It is essential that the writing period Tam for the digital videosignals of the m-th bit to be written in the pixels is shorter than thedisplay period Trm. It is, therefore, necessary, that the value of thebit number m has such one of 1 to n that the writing period Tam may beshorter than the display period Trm.

[0183] On the other hand, the display periods Tr1 to Trn may be made toappear in any sequence. For one frame period, for example, the displayperiods can be made to appear in the sequence of Tr1 and then Tr3, Tr5,Tr2, - - - , and so on. However, the more preferable sequence is thatthe display periods Tr1 to Trn do not overlap. On the other hand, themore preferable sequence is that the erasure periods Tel to Ten do notoverlap either.

[0184] With the construction thus far described, according to theinvention, the dispersion of the current to be outputted when an equalgate voltage is applied to the current controlling TFTs can besuppressed by the TFTs even with more or less dispersion in theI_(DS)-V_(GS). It is, therefore, possible to avoid the situation inwhich the luminescences of the EL elements are made seriously differentbetween the adjoining pixels by the dispersion of the I_(DS)-V_(GS)characteristics, even if signals at an equal voltage are inputted.

[0185] In this embodiment, on the other hand, first current controllingTFTs and second current controlling TFTs are arranged in parallel as thecurrent controlling TFTs. As a result, the heat, as generated by theelectric current to flow the active layer of the current controllingTFTs, can be efficiently radiated to suppress the deterioration of thecurrent controlling TFTs. It is also possible to suppress the dispersionof the drain current which is caused by the dispersion of thecharacteristics such as the threshold value or the mobility of thecurrent controlling TFTs.

[0186] In this embodiment, on the other hand, it is possible to providethe non-luminescence period for no display. In the case of the analogdrive of the prior art, the EL elements always luminesce to cause theadvance the deterioration of the EL layer, if a blank image is displayedin the light-emitting device. In this embodiment, the non-luminescenceperiod can be provided to suppress the deterioration of the EL layer tosome extent.

[0187] Here in this embodiment, the display period and the writingperiod partially overlap. In other words, the pixels can display evenfor the writing period. Therefore, the ratio (or the duty ratio) of thesum of the durations of the display periods for one frame period is notdetermined exclusively by the duration of the writing period.

[0188] Here, this embodiment is given a structure in which the capacitoris provided for retaining the voltage to be applied to the gateelectrode of the current controlling TFT, but the capacitor can beeliminated. Where the current controlling TFT has an LDD regionoverlapping the gate electrode through the gate insulating film, aparasitic capacity, as generally called the “gate capacity” isestablished in the overlapping region. This gate capacity may bepositively used as the capacitor for latching the voltage to be appliedto the gate electrode of the current controlling TFT.

[0189] The value of this gate capacity changes with the overlapping areabetween the gate electrode and the LDD region so that it is determinedby the length of the LDD region contained in the overlapping region.

[0190] Next, the pixel of the light-emitting device of this embodimentwill be described with reference to the top plan view shown in FIG. 12.Here, FIGS. 9, 10 and 12 may be referred to one another because they usecommon reference characters.

[0191] In FIG. 12, the pixel is the region 901 which is provided withone source signal line (S), one current supply line (V), one writinggate signal line (Ga) and one erasing gate signal line (Ge). The pixel901 is further provided with the switching TFT 1001, the currentcontrolling TFT 1002 and the erasing TFT 1004.

[0192] The switching TFT 1001 is provided with an active layer 1001 aand a gate electrode 1001 b forming part of the writing gate signal line(Ga). The current controlling TFT 1002 is provided with an active layer1002 a and a gate electrode 1002 b forming part of a gate wiring line1201. The erasing TFT 1004 is provided with an active layer 1004 a and agate electrode 1004 b forming part of the writing gate signal line (Ge).

[0193] One of the source region and the drain region owned by the activelayer 1001 a of the switching TFT 1001 is connected with the sourcesignal line, and the other is connected with the gate wiring line 1201through a connecting wiring line 1202. Here, the line 1202 is calledeither the source wiring line or the drain wiring line in dependenceupon the potential of the signal to be inputted to the source signalline (S).

[0194] One of the source region and the drain region owned by the activelayer 1004 a of the erasing TFT 1004 is connected with the source signalline, and the other is connected with the gate wiring line 1201 througha connecting wiring line 1203. Here, the line 1202 is called either thesource wiring line or the drain wiring line in dependence upon thesupply potential of the current supply line (V).

[0195] The source region and the drain region owned by the active layer1002 a of the current controlling TFT 1002 are connected with thecurrent supply line (V) and a drain wiring line 1204, respectively. Thisdrain wiring line 1204 is connected with a pixel electrode 1205.

[0196] A capacity wiring line 1206 is formed of a semiconductor film.The capacitor 1003 is formed between the capacity wiring line 1206electrically connected with the current supply line (V), and the(not-shown) insulating film in a common layer to the gate insulatingfilm and the gate wiring line 1201. On the other hand, a capacitor, asformed of the gate wiring line 1201, the (not-shown) layer in a commonlayer to the first layer insulating film and the current supply line(V), can also be used as the capacitor.

[0197] Over the pixel electrode 1205, a bank having an aperture 1207 isformed by etching an organic resin film. Moreover, the EL layer and theopposed electrode are sequentially laminated over the pixel electrode1205, although not shown. The pixel electrode 1205 and the EL layercontact in the aperture 1207 of the bank so that the EL layer luminescesat only the portion narrowed in contact with the opposed electrode andthe pixel electrode.

[0198] Here, the top plan view of the pixel unit in the light-emittingdevice of the invention should not be limited to the construction shownin FIG. 12. On the other hand, this embodiment can be practiced incombination of the construction of Embodiment 1.

[Embodiment 3]

[0199] With reference to FIGS. 13A and 13B and 14, here will bedescribed the case in which the light-emitting device of the inventionis driven in an analog method.

[0200]FIG. 13A is a block diagram of the light-emitting device of thisembodiment. Numeral 1301 designates a source signal line driver circuit;numeral 1302 designates a gate signal line driver circuit; and numeral1303 designates a pixel portion. This embodiment is constructed to haveone source signal line driver circuit and one gate signal line drivercircuit, but the invention should not be limited to that construction.There may be provided two source signal line driver circuits and twogate signal line driver circuits.

[0201] The source signal line driver circuit 1301 is provided with ashift register 1301 a, a level shifter 1301 b and a sampling circuit1301 c. Of these, the level shifter 1301 b may be employed, ifnecessary, but is not indispensable. In the construction of thisembodiment, the level shifter 1301 b is interposed between the shiftregister 1301 a and the sampling circuit 1301 c but the invention shouldnot be limited to that construction. The construction may be modifiedsuch that the level shifter 1301 b is incorporated into the shiftregister 1301 a.

[0202] Here, a source signal line 1304 connected electrically with thesource signal line driver circuit 1301 and the current supply lineconnected electrically with a power source 1307 are not connecteddirectly with the pixel portion 1303, but the wiring line connectedelectrically from a switching circuit 1308 with the pixels is switchedto the source signal line or the current supply line in response to theswitching signal inputted to the switching circuit 1308 and iselectrically connected with the pixel portion 1303.

[0203] In short, the wiring line connecting the switching circuit 1308and the pixel portion 1303 is made so common that it is switched to thesource signal line or the current supply line in response to theswitching signal inputted to the switching circuit 1308. In thisembodiment, however, the source signal lines over the pixels or thecurrent supply lines are not adjacent to one another.

[0204] Since one wiring line is switched to the source signal line orthe current supply line, as described above, there does not function thepixel where the wiring line connected with the switching TFT is thecurrent supply line. In other words, the source signal line or thecurrent supply line are not adjacent to each other but are alternatelyswitched so that the pixels to function are alternately switched onevery pixel columns in the vertical direction.

[0205] In the pixel portion 1303, there are individually intersectedsuch ones 1304 (1304_1 to 1304_x) of the source signal lines connectedwith the source signal line driver circuit 1301 as are selected by theswitching circuit 1308, the (not-shown) current supply line selected bythe switching circuit 1308, and a y-number of gate signal lines 1306(1306_1 to 1306_y) connected with the gate signal line driver circuit1302. On the other hand, a current supply line 1305 is retained at aconstant potential (or the supply potential) by connecting it with thepower source 1307.

[0206] On the other hand, the gate signal line driver circuit 1302 isprovided with a shift register and a buffer (although neither of them isshown). The driver circuit 1302 may be further provided with the levelshifter.

[0207] A clock signal (CLK) and a start pulse signal (SP) are inputtedas panel control signals to the shift register 1301 a. From this shiftregister 1301 a, there is outputted a sampling signal for sampling thevideo signals. The sampling signal outputted is inputted to the levelshifter 1301 b so that it is outputted with an enlarged potentialamplitude.

[0208] The sampling signal thus outputted from the level shifter 1301 bis inputted to the sampling circuit 1301 c. Simultaneously with this,the video signals are inputted through the video signal line to thesampling circuit 1301 c.

[0209] In this sampling circuit 1301 c, the video signals inputted aresampled with the sampling signal and are individually inputted to thesource signal lines 1304.

[0210]FIG. 13B shows a pixel structure of the pixel portion 1303 of thelight-emitting device shown in FIG. 13A. The y-number of gate signallines 1306 (1306_1 to 1306_y) for inputting the selection signal fromthe gate signal line driver circuit 1302 are connected with the gateelectrodes of switching TFTs 1309 owned by the individual pixels. On theother hand, either the source region or the drain region of theswitching TFT 1309 owned by each pixel is connected with an x-numbersource signal line 1304 (1304_1 to 1304_x) for inputting the videosignals, and the remaining region is connected with the gate electrodeof current controlling TFT 1310 owned by each pixel and a capacitor 1311owned by each pixel.

[0211] A source region of the current controlling TFT 1310 owned by eachpixel is connected with the current supply line 1305 and at its drainregion with the anode or cathode of an EL element 1313. On the otherhand, the current supply line 1305 is connected with the capacitor 1311owned by each pixel. Here, this embodiment is exemplified by theconstruction having the capacitor 1311, which need not always beprovided.

[0212] The EL element 1313 is composed of an anode, a cathode and an ELlayer formed between an anode and a cathode. Where the anode of the ELelement 1313 is connected with the drain region of the currentcontrolling TFT 1310, the anode of the EL element 1313 acts as the pixelelectrode whereas the cathode acts as the opposed electrode. Where thecathode of the EL element 1313 is connected with the drain region of thecurrent controlling TFT 1310, on the contrary, the anode of the ELelement 1313 acts as the opposed electrode whereas the cathode acts asthe pixel electrode.

[0213] In FIG. 14, there is shown the timing chart of the case in whichthe light-emitting device described with reference to FIG. 13 is drivenby the analog method. The period after one gate signal line was selectedand before another gate signal line is selected is called the “one lineperiod (L)”. Here in this embodiment, the selection of the gate signalline means that a selection signal having a potential to turn ON theswitching TFT is inputted to the gate signal line.

[0214] On the other hand, the period from the display of one image tothe display of a next image corresponds to the one frame period (F). Forexample, the light-emitting device having the y-number of gate signallines is provided with a y-number of line periods (L1 to Ly) for oneframe period.

[0215] For the first line period (L1), the gate signal line 1306 isselected with the selection signal inputted from the gate signal linedriver circuit 1302 so that all the switching TFTs 1309 connected withthe gate signal line 1306 are turned ON. Then, the video signals aresequentially inputted from the source signal line driver circuit 1301 tothe x-number of source signal lines (1304_1 to 1304_x). The videosignals thus inputted to the source signal lines (1304_1 to 1304_x) areinputted through the switching TFT 1309 to the gate electrode of thecurrent controlling TFT 1310.

[0216] The amount of the current to flow through the channel formingregion of the current controlling TFT 1310 is controlled with a gatevoltage Vgs or the potential difference between the gate electrode andthe source region of the current controlling TFT 1310. Therefore, thepotential to be given to the pixel electrode of the EL element 1313 isdetermined by the level of the potential of the video signals inputtedto the gate electrode of the current controlling TFT 1310. As a result,the EL element 1313 luminesces under the control of the potential of thevideo signals.

[0217] When the aforementioned actions are repeated to end the inputtingof the video signals to the source signal lines 1304 (1304_1 to 1304 x),the first line period (L1) is ended. Here, the sum of the period to theend of the inputting of the video signals to the source signal lines1304 (1304_1 to 1304_x) and the horizontal flyback period may be set tothe one line period. When a second line period (L2) is then started, thegate signal line 1306_2 is selected with the selection signals so thatthe video signals are sequentially inputted like the first line period(L1) to the source signal lines 1304 (1304_1 to 1304_x).

[0218] When all the gate signal lines (1306_1 to 1306_y) are selected,all the line periods (L1 to Ly) are ended. When all the line periods (L1to Ly) are ended, the one frame period is ended. For this one frameperiod, all the pixels are displayed to form one image. Here, the sum ofall the line periods (L1 to Ly) and the vertical flyback period may beset to the one frame period.

[0219] Thus, the luminescence of the EL element is controlled with thepotential of the video signals thereby to effect the gradation display.

[0220] The construction of this embodiment can be practiced by combiningthe constructions of Embodiment 1 and Embodiment 2.

[Embodiment 4]

[0221] For practicing the light-emitting device of the invention, thecurrent controlling TFT may be driven with the region which has thefollowing voltage-current characteristics.

[0222] First of all, in the driving case of the digital method, thecurrent controlling TFT and the EL element are preferably driven so thatthe action point of the two elements, i.e., the current controlling TFTand the EL element (that is, the point where the voltage-currentcharacteristics of the two elements take identical values) may be in thelinear region. As a result, it is possible to perform the gradationdisplay which suppresses the luminescence dispersion of the EL element,as caused by the displacement of the characteristics of the currentcontrolling TFT.

[0223] In the case of the analog drive, on the other hand, the currentcontrolling TFT and the EL element are preferably drive so that theaction point may be located in the saturation region where the currentvalue can be controlled by the gate voltage |V_(GS)|.

[Embodiment 5]

[0224] A light-emitting device has superior visibility in brightlocations in comparison to a liquid crystal display device because it isa self-emissive type device, and moreover its field of vision is wide.Accordingly, it can be used as a display portion for various electricdevices. For example, it is appropriate to use the light-emitting deviceof the present invention as a display portion of a light emitting device(an electro-optic device incorporating the light-emitting device in itscasing) having a diagonal equal to 30 inches or greater (typically equalto 40 inches or greater) for appreciation of TV broadcasts by a largescreen.

[0225] Note that all displays exhibiting (displaying) information suchas a personal computer display, a TV broadcast reception display, or anadvertisement display are included as the light-emitting display.Further, the light-emitting device of the present invention can be usedas a display portion of the other various electric devices.

[0226] The following can be given as examples of such electric devicesaccording to the present invention: a video camera; a digital camera; agoggle type display (head mounted display); a car navigation system; anaudio reproducing device (such as a car audio system, an audio composystem); a notebook personal computer; a game equipment; a portableinformation terminal (such as a mobile computer, a mobile telephone, amobile game equipment or an electronic book); and an image playbackdevice provided with a recording medium (specifically, a device whichperforms playback of a recording medium and is provided with a displaywhich can display those images, such as a digital video disk (DVD)). Inparticular, because portable information terminals are often viewed froma diagonal direction, the wideness of the field of vision is regarded asvery important. Thus, it is preferable that the light-emitting device isemployed. Examples of these electric devices are shown in FIGS. 15 and16.

[0227]FIG. 15A is a light-emitting device, containing a casing 2001, asupport stand 2002, and a display portion 2003. The light-emittingdevice of the present invention can be used in the display portion 2003.Since the light-emitting device is a self-emissive type device withoutthe need of a backlight, its display portion can be made thinner than aliquid crystal display device.

[0228]FIG. 15B is a video camera, containing a main body 2101, a displayportion 2102, an audio input portion 2103, operation switches 2104, abattery 2105, and an image receiving portion 2106. The light-emittingdevice of the present invention can be used in the display portion 2102.

[0229]FIG. 15C is a portion of a head mounted type electro-optic device(right side), containing a main body 2201, a signal cable 2202, a headfixing band 2203, a screen portion 2204, an optical system 2205, and adisplay portion 2206. The light-emitting device of the present inventioncan be used in the display portion 2206.

[0230]FIG. 15D is an image playback device (specifically, a DVD playbackdevice) provided with a recording medium, containing a main body 2301, arecording medium (such as a DVD) 2302, operation switches 2303, adisplay portion (a) 2304, and a display portion (b) 2305. The displayportion (a) 2304 is mainly used for displaying image information, andthe image portion (b) 2305 is mainly used for displaying characterinformation, and the light-emitting device of the present invention canbe used in the display portions (a) 2304 and (b) 2305. Note thatdomestic game equipment is included as the image playback deviceprovided with a recording medium.

[0231]FIG. 15E is a goggle type display (head mounted display),containing a main body 2401, a display portion 2402, and an arm portion2403. The light-emitting device of the present invention can be used inthe display portion 2402.

[0232]FIG. 15F is a personal computer, containing a main body 2501, acasing 2502, a display portion 2503, and a keyboard 2504. Thelight-emitting device of the present invention can be used in thedisplay portion 2503.

[0233] Note that in the future if the emission luminance of EL materialsbecomes higher, the projection of light including outputted images canbe enlarged by lenses or the like. Then it will become possible to usethe light-emitting device in a front type or a rear type projector.

[0234] The above electric devices are becoming more often used todisplay information provided through an electronic transmission circuitsuch as the Internet or CATV (cable television), and in particular,opportunities for displaying animation information are increasing. Theresponse speed of EL materials is extremely high, and therefore thelight-emitting device is favorable for performing animation display.

[0235] The emitting portion of the light-emitting device consumes power,and therefore it is preferable to display information so as to have theemitting portion become as small as possible. Therefore, when using thelight-emitting device in a display portion which mainly displayscharacter information, such as a portable information terminal, inparticular, a portable telephone and an audio reproducing device, it ispreferable to drive it by setting non-emitting portions as backgroundand forming character information in emitting portions.

[0236]FIG. 16A is a portable telephone, containing a main body 2601, anaudio output portion 2602, an audio input portion 2603, a displayportion 2604, operation switches 2605, and an antenna 2606. Thelight-emitting device of the present invention can be used in thedisplay portion 2604. Note that by displaying white characters in ablack background in the display portion 2604, the power consumption ofthe portable telephone can be reduced. Further, in the case whereperiphery is dark, it is effective that the power consumption can bereduced by decreasing the applied voltage, thereby lowering luminance.

[0237]FIG. 16B is an audio reproducing device, specifically a car audiosystem, containing a main body 2701, a display portion 2702, andoperation switches 2703 and 2704. The light-emitting device of thepresent invention can be used in the display portion 2702. Furthermore,an audio reproducing device for a car is shown in Embodiment 5, but itmay also be used for a mobile type and a domestic type of audioreproducing device. Note that by displaying white characters in a blackbackground in the display portion 2702, the power consumption can bereduced. This is particularly effective in a mobile type audioreproducing device.

[0238] The range of applications of the present invention is thusextremely wide, and it is possible to apply the present invention toelectric devices in all fields. Furthermore, electric devices of theEmbodiment 5 may use the light-emitting device having any constitutionshown in Embodiments 1 to 4.

What is claimed is:
 1. A light-emitting device comprising: a pluralityof pixels over a substrate; a plurality of gate signal lines, and aplurality of source signal lines; a plurality of current supply lines;and a plurality of thin film transistors electrically connected withsaid plurality of pixels, wherein said plurality of source signal linesand said plurality of current supply lines are electrically interchangedalternately.
 2. A light-emitting device according to claim 1, whereinsaid source signal lines and said plurality of current supply lines areelectrically interchanged for every one frame period.
 3. Alight-emitting device according to claim 2, wherein said one frameperiod is 1/240 to 1/120 sec.
 4. A light-emitting device according toclaim 1, wherein said plurality of source signal lines and saidplurality of current supply lines are electrically connected with aswitching circuit.
 5. A light-emitting device according to claim 4,wherein in response to a switching signal for controlling said switchingcircuit, said source signal lines or said current supply lines areelectrically connected with a switching TFT of a pixel unit.
 6. Alight-emitting device according to claim 1, wherein said source signallines or said current supply lines are electrically connected with acurrent controlling TFT of the pixel unit.
 7. A light-emitting deviceaccording to claim 4, wherein said switching circuit comprises atransmission gate.
 8. A light-emitting device according to claim 1,wherein said light emitting device is an electro-luminescence displaydevice.
 9. A light-emitting device according to claim 1, wherein saidlight-emitting device is one selected from the group consisting of avideo camera, a digital camera, a goggle type display, a personalcomputer, and a mobile telephone.
 10. A light-emitting devicecomprising: a plurality of pixels over a substrate; a plurality of gatesignal lines, and a plurality of source signal lines; and a plurality ofswitching TFTs, and a plurality of current controlling TFTs, whereineither drain regions or source regions of said switching TFTs areelectrically connected with said plurality of source signal lines andwith source regions of said current controlling TFTs of adjacent pixels.11. A light-emitting device according to claim 10, wherein said lightemitting device is an electro-luminescence display device.
 12. Alight-emitting device according to claim 10, wherein said light-emittingdevice is one selected from the group consisting of a video camera, adigital camera, a goggle type display, a personal computer, and a mobiletelephone.
 13. A light-emitting device comprising: a plurality ofpixels; a plurality of gate signal lines, and a plurality of sourcesignal lines; a plurality of current supply lines; and a plurality ofswitching TFTs, and a plurality of current controlling TFTs, whereineither source regions or drain regions of said switching TFTs in pixelsof (x-−1)-th column are electrically connected with said plurality ofcurrent supply line of said pixels of said (x−2)-th column, when eitherdrain regions or source regions of said switching TFTs in pixels of(x−2)-th column are electrically connected with said plurality of sourcesignal lines.
 14. A light-emitting device according to claim 13, whereinsaid light emitting device is an electro-luminescence display device.15. A light-emitting device according to claim 13, wherein saidlight-emitting device is one selected from the group consisting of avideo camera, a digital camera, a goggle type display, a personalcomputer, and a mobile telephone.
 16. A light-emitting devicecomprising: a plurality of pixels over a substrate; a plurality of gatesignal lines, and a plurality of source signal lines; and a plurality ofthin film transistors electrically connected with said plurality ofpixels, wherein one of said plurality of source signal lines function asa current supply line.
 17. A light-emitting device according to claim16, wherein said source signal lines and said plurality of currentsupply lines are electrically interchanged for every one frame period.18. A light-emitting device according to claim 17, wherein said oneframe period is 1/240 to 1/120 sec.
 19. A light-emitting deviceaccording to claim 16, wherein said light emitting device is anelectro-luminescence display device.
 20. A light-emitting deviceaccording to claim 16, wherein said light-emitting device is oneselected from the group consisting of a video camera, a digital camera,a goggle type display, a personal computer, and a mobile telephone. 21.A light-emitting device comprising: a plurality of pixels over asubstrate; a plurality of gate signal lines electrically connected witha gate signal line driver circuit over said substrate; a plurality ofsource signal lines electrically connected with a source signal linedriver circuit over said substrate; a plurality of current supply lines;a switching circuit over said substrate; and a plurality of thin filmtransistors electrically connected with said plurality of pixels,wherein said plurality of source signal lines and said plurality ofcurrent supply lines are electrically interchanged alternately by saidswitching circuit.
 22. A light-emitting device according to claim 21,wherein said source signal lines and said plurality of current supplylines are electrically interchanged for every one frame period.
 23. Alight-emitting device according to claim 22, wherein said one frameperiod is 1/240 to 1/120 sec.
 24. A light-emitting device according toclaim 21, wherein said switching circuit comprises a transmission gate.25. A light-emitting device according to claim 21, wherein said lightemitting device is an electro-luminescence display device.
 26. Alight-emitting device according to claim 21, wherein said light-emittingdevice is one selected from the group consisting of a video camera, adigital camera, a goggle type display, a personal computer, and a mobiletelephone.